TransSiP's ground-breaking device level power integrity (PI) technology enables the use of digital power in low power and noise-sensitive applications, bringing advantages of stability, efficiency (i.e. longer battery life), and precision to wireless portable, wearable, remote, and IoT devices. Developed using a novel methodology employing cutting-edge real-time spectrum analysis techniques revealing signal details invisible to conventional spectrum and vector signal analyzers, TransSiP's innovative JC-PFM DC-DC conversion circuit topology is applicable to a broad range of noise-sensitive applications and compatible with system-in-package devices. This patents-pending design and methodology addresses the critical needs of noise-sensitive microsystems at the heart of portable, wearable, and IoT/M2M wireless communications and navigation for clean power and high conversion efficiencies in both full and standby power modes.

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Seeing is Believing...

The well-known components of PFM type switched mode DC-DC supply bias noise:

  • Output voltage ripple

  • Harmonics of switching frequency/frequencies

  • Ringing (due to parasitics)

  • Spurious or transient events

can be filtered and suppressed, although the variable frequency of PFM switched-mode converters can make this problematic. However, once ripple and noise on the supply bias is attenuated, TransSiP has found that noise amplitude is no longer the dominant factor.
Real-time spectrum analysis provided the answer: there are very short, varying interval transient and spurious events associated with a time domain component. This component, which TransSiP has termed “SNJ” (switching noise jitter) is what causes the chaotic noise signatures that compromise powered system performance.
Read Tektronix’ case study here.


A New Approach

Download the White Paper

The insights provided by DPX® analysis and mathematical modelling led to the development of a new filtering concept for switched-mode PFM-type DC-DC converters. This new circuit topology can be implemented in the form of a discrete SiP component on the output of a PFM DC-DC converter, as a component set on a system motherboard, or as a complete DC-DC conversion solution: TransSiP's Symphony A2™ PI chipset.

symphony a2™ PI CHIPSET application block diagram


key features

  • Best-in-Class Noise Profile: Enabled by Patents-pending TransSiP JC SNJ™ conditioning technology

  • Ultra-Low Power, High Efficiency from Light-to-Full Load: up to 95%

  • 0.6 V to 4.0 V Fine Customizable Vout (±2%, 0.05V step increments)

  • Freedom in Vcc Rail Distribution (restricted placement of POL regulator not required)

  • Less than 100 nA Stand-by Current (i.e. negligible to battery self-discharge)

  • 2 V to 6 V Wide VIN Range and Stable VOUT with Pulsed Applications

  • 500 nA Typical Quiescent Current

  • Output Current: 200mA / 50mA

  • Integrated Inductor (optional)

  • High Speed Start-up

  • Input Voltage Bypass

  • Input Undervoltage Lockout (UVLO)

  • Quick Output Discharge for Rapid Charge Release

  • Short Circuit Protection

  • Rush Current Limit